The role involves leading design verification for AMS designs including components like droop sensing and PLL. Responsibilities include creating UVM benches, writing assertions, analyzing verification coverage, and collaborating with various teams to achieve complete verification.
Join a well funded hardware startup as an AMS DV engineer leading the design verification for droop sensing, clocking, PLL, LDO, On-die VRs and PMICs using latest finfet technology nodes. Our mission is to reimagine silicon and disrupt the high performance computing platforms with the RiscV based chiplet designs.
Responsibilities
- Responsible for performing verification for AMS designs.
- Create UVM benches for mixed signal blocks and developing test scenarios.
- Work closely with the architecture and design teams on verification plan and methodology to achieve complete verification coverage
- Write assertions and checkers for the properties and corner cases
- Analyze verification coverage and improve the test cases
- Integrate analogue design IPs from vendors and internal teams and develop verification environments for simulation and emulation
Requirements
- Detailed knowledge of verification using SystemVerilog
- Experience with creating UVM based testbenches for Analog Mixed-Signal applications
- Experience with assertion based verification for analog blocks
- Experience with power aware verification with UPF will be a plus
- UVM-AMS experience preferred
- Experience with sv-real preferred
- Scripting skills in perl / python is preferred
- Excellent communication skills
- Team player with an ability to encourage team members
Education & Experience
- MS (preferred in EE and CE) plus 5 years
Top Skills
Perl
Python
Systemverilog
Uvm
Similar Jobs
Be an Early Applicant
As a Senior Manager of Software Engineering, you will mentor multiple technical teams in the Consumer and Business Intelligence sector, driving operational efficiencies and influencing budgetary decisions. Your role involves overseeing software engineers, ensuring successful collaboration, and promoting a culture of diversity and inclusion within the team.
Be an Early Applicant
As a Data Domain Architect Analyst, you will improve client experiences and streamline processes by overseeing data quality and delivery. Collaborate with global teams, manage relationships, and work on process improvements while ensuring timely reporting and data integrity in a fast-paced environment.
Be an Early Applicant
Sr. Machine Learning Engineer leveraging large-scale computation, substantial datasets, and machine learning to enhance crucial customer products. Responsible for analyzing complex datasets, developing algorithms, managing ML Ops, and communicating findings to stakeholders.
What you need to know about the Pune Tech Scene
Once a far-out concept, AI is now a tangible force reshaping industries and economies worldwide. While its adoption will automate some roles, AI has created more jobs than it has displaced, with an expected 97 million new roles to be created in the coming years. This is especially true in cities like Pune, which is emerging as a hub for companies eager to leverage this technology to develop solutions that simplify and improve lives in sectors such as education, healthcare, finance, e-commerce and more.
