Marvell Technology Logo

Marvell Technology

Principal Engineer, RTL Design

Posted 21 Days Ago
Be an Early Applicant
2 Locations
Senior level
2 Locations
Senior level
The Principal Engineer will define micro-architectures, implement RTL coding, collaborate with various teams, and mentor junior engineers in semiconductor solutions.
The summary above was generated by AI

About Marvell

Marvell’s semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, automotive, and carrier architectures, our innovative technology is enabling new possibilities. 

At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead. 

Your Team, Your Impact

Marvell is empowering the global data economy. Whether at the network core or edge, our leadership technologies make it possible for the world’s data to be processed, moved, stored and secured faster and more reliably. With leading intellectual property and deep system‐level knowledge, Marvell's infrastructure semiconductor solutions are transforming the 5G, cloud computing, enterprise and automotive markets of tomorrow. Marvell Compute and Custom Solutions has been at the forefront of developing and delivering leading edge, high-performance data processing silicon platforms. By delivering a stream of technical innovations through a diverse set of fast-growing product lines, Marvell technology is powering the next-generation data processing and workload acceleration platforms for multiple market segments.

What You Can Expect

  • Collaborate with the Architecture team to define the micro-architecture of the chip.
  • Develop specifications and micro-architecture for one or more blocks.
  • Implement RTL coding using best practices.
  • Work with physical design teams for synthesis and timing signoff.
  • Partner with verification teams on test plans, coverage analysis, and debugging.
  • Support post-silicon validation for production qualification.
  • Coordinate with project managers on task allocation and mentorship.
  • Engage with multiple design centers to enhance methodologies.
  • Collaborate with software teams to ensure compatibility with software use cases.
  • Mentor and provide technical guidance to junior engineers.

What We're Looking For

  • Bachelor’s degree in Computer Science, Electrical Engineering or related fields and 12-15 years of related professional experience or Master’s degree and/or PhD in Computer Science, Electrical Engineering or related fields with 10-12 years of experience.
  • Micro-architecture experience for complex Custom/ASIC products.
  • Strong logic design and debugging skills; expertise in AHB, AXI, I2C, UART.
  • Hands-on RTL design, synthesis, timing closure, formal verification, and gate-level simulations.
  • Knowledge of PCIe, SPI, USB, DDR2/DDR3 is a plus.
  • Proficiency in front-end design tools and methodologies.
  • Scripting skills in Perl, Tcl, UNIX shell are a plus.
  • Strong leadership, communication, and problem-solving skills.
  • Ability to thrive in a fast-paced environment and drive team success

Additional Compensation and Benefit Elements

With competitive compensation and great benefits, you will enjoy our workstyle within an environment of shared collaboration, transparency, and inclusivity. We’re dedicated to giving our people the tools and resources they need to succeed in doing work that matters, and to grow and develop with us. For additional information on what it’s like to work at Marvell, visit our Careers page.

All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status.

#LI-KP1

Top Skills

Ahb
Axi
Ddr2
Ddr3
I2C
Pcie
Perl
Rtl
Spi
Tcl
Uart
Unix Shell
Usb

Similar Jobs

4 Hours Ago
Hybrid
2 Locations
Senior level
Senior level
Big Data • Fintech • Information Technology • Business Intelligence • Financial Services • Cybersecurity • Big Data Analytics
The Lead DevOps Engineer will design and maintain cloud infrastructure, oversee automation processes, lead incident remediations, and ensure compliance and efficiency in system performance.
Top Skills: AWSGCPGrafanaHelmKubectlKubernetesLinuxPrometheusTerraformWindowsYaml
4 Hours Ago
Hybrid
Mumbai, Maharashtra, IND
Mid level
Mid level
Fintech • Software
Responsible for maintaining a low latency trading environment, overseeing trading systems, developing automation tools, and enhancing trading strategies.
Top Skills: DockerGrafanaKubernetesLinuxPrometheusPuppetPythonShell Scripting
4 Hours Ago
Hybrid
Mumbai, Maharashtra, IND
Senior level
Senior level
Fintech • Software
Responsible for automating and optimizing Linux infrastructure, enhancing configuration management, troubleshooting issues, and supporting metrics and log collection tools.
Top Skills: Alert ManagerAlertaAnsibleCi/CdDockerEbpfGitGrafanaHieraKubernetesLsofNcNmapNmcliNtpOpsgeniePrometheusPtpPuppetPythonStraceSystemdTcpdump

What you need to know about the Pune Tech Scene

Once a far-out concept, AI is now a tangible force reshaping industries and economies worldwide. While its adoption will automate some roles, AI has created more jobs than it has displaced, with an expected 97 million new roles to be created in the coming years. This is especially true in cities like Pune, which is emerging as a hub for companies eager to leverage this technology to develop solutions that simplify and improve lives in sectors such as education, healthcare, finance, e-commerce and more.

Sign up now Access later

Create Free Account

Please log in or sign up to report this job.

Create Free Account