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Alphawave IP, Inc.

Staff Engineer I – PCIe Verification

Posted 13 Days Ago
Be an Early Applicant
2 Locations
Senior level
2 Locations
Senior level
Responsible for verifying IP, Block, or Subsystem at SoC level. Duties include developing verification environments, documentation, and debugging tasks.
The summary above was generated by AI

The Opportunity

We're looking for the Wavemakers of tomorrow.

Alphawave Semi enables tomorrow’s future by accelerating the critical data communication at the heart of our digital world – from seamless video streaming to AI to the metaverse and much more. Our technology powers product innovation in the most data-demanding industries today, including data centers, networking, storage, artificial intelligence, 5G wireless infrastructure, and autonomous vehicles. Customers partner with us for mission-critical data communication, our innovative technologies, and our proven track record. Together, we enable the next generation of digital technology.

What You'll Do

  • Will be responsible for verification of IP, Block, or Subsystem at Soc Level.
  • Generate appropriate documentation for verification.
  • Responsible for analyzing/debugging given blocks/tasks in verification.
  • Should be able to develop own verification environment, verification components developed.
  • You will report to Lead Engineer.

What You'll Need:

  • 7+ years of experience with a Bachelors'/ Master's degree in the field of Electrical, Electronics, or computer engineering
  • Should have a good understanding of verification flow, challenges, and requirements of functional verification.
  • Have worked on IP level or Block level or SoC level functional verification.
  • Experience with digital verification aspects such as constrained random verification, functional coverage, code coverage, assertions, methodology & philosophy.
  • Expert in System Verilog, Verilog, and OVM/UVM verification methodology.
  • Have working experience on AMBA interface protocols (AXI, AHB, APB) and CHI protocol.
  • Knowledge of Verilog/System Verilog, digital simulation, and debugging is a must.
  • Hands-on experience working with the following protocols is desired – PCIe/CXL/HBM 2/2E/HBM3.
  • Experience with Perl, Python or similar scripting languages will be helpful.
  • Ability to adapt & learn, quickly and willingness to proactively take on responsibilities beyond the job description to accomplish team goals.

"Hybrid work environment"

As part of our commitment to the well-being and satisfaction of our employees, we have designed a comprehensive benefits package that includes:

Competitive Compensation Package

Restricted Stock Units (RSUs)

Hybrid Working Model

Provisions to pursue advanced education from Premium Institute, eLearning content providers

Medical Insurance and a cohort of Wellness Benefits

Educational Assistance

Advance Loan Assistance

Office lunch & Snacks Facility

Equal Employment Opportunity Statement

Alphawave Semi is an equal opportunity employer, welcoming all applicants regardless of age, gender, race, disability, or other protected characteristics. We value diversity and provide accommodations during the recruitment process.

Top Skills

Ahb
Amba
Apb
Axi
Cxl
Hbm
Ovm
Pcie
Perl
Python
System Verilog
Uvm
Verilog

Alphawave IP, Inc. Pune, Mahārāshtra, IND Office

Sai Radhe Commercial Complex B-Wing, Final Plot No. 100+101, Pune, Maharashtra, India, 411001

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