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Semiconductor
The Senior Engineer I - DFT will lead DFT strategy, develop verification methodologies, automate test bench creation, and ensure timing checks for SoCs.
Top Skills:
Verilog,Vhdl,System Verilog,Perl,Tcl,Python,Jtag,Bist
Semiconductor
Lead timing convergence for SoCs by setting up and signing off STA for complex designs, managing constraints, and developing automation scripts.
Top Skills:
Asic DesignCadenceDftGdsPerlPythonRtlSynopsysTclVerilogVhdl
Semiconductor
Lead and manage the ASIC verification team for ARM-based SoC designs, implementing verification strategies and collaborating with cross-functional teams while ensuring comprehensive coverage and mentoring junior engineers.
Top Skills:
CC/C++ExceliumPerlPythonQuestaRtlSystemverilogUvmVcs
Semiconductor
Develop Interface and Analog IPs for ASIC and external customers, ensuring solid IP development methodologies and supporting multiple customers through hands-on engineering.
Top Skills:
Analog IpAsicCircuit DesignDdrFinfetHbmMixed SignalSerdes
Semiconductor
This role involves driving backend physical design processes, including power planning, timing verification, and physical verification for IC design.
Top Skills:
Clock Tree SynthesisDrcErcIc DesignLvsPhysical DesignStatic Timing Verification
Semiconductor
Develop device interface functions, oversee firmware lifecycle, collaborate on validation requirements, mentor junior engineers, and enhance processes.
Top Skills:
ArmBios/UefiC/C++Eda ToolsEthernetI2CLinux KernelMipsNvmePciePythonRiscvRtosSerdesSpi/QspiSystem VerilogUsbVerilog
Semiconductor
Responsible for verifying IP, Block, or Subsystem at SoC level. Duties include developing verification environments, documentation, and debugging tasks.
Top Skills:
AhbAmbaApbAxiCxlHbmOvmPciePerlPythonSystem VerilogUvmVerilog
Semiconductor
The role involves managing a design/RTL team, supporting pre-sales architecture proposals, and ensuring delivery of micro-architecture for SoCs. Responsibilities include collaboration with customers, IP vendors, and technical support.
Top Skills:
AhbAxiDesign Compiler SynthesisEthernetFormal VerificationMicro-ArchitecturePcieSoc DevelopmentUsb
Semiconductor
Responsible for pre-sales support, architecture proposal, managing design teams, achieving project goals, and providing technical support to customers.
Top Skills:
AhbAsic DesignAxiDesign Compiler SynthesisEthernetFormal VerificationLecMicro-ArchitecturePcieSoc DevelopmentTiming ClosureUsb
Semiconductor
The Design Verification Engineer will oversee verification of new features, build testbenches, and integrate protocols while collaborating with various technical teams to improve methodologies.
Top Skills:
C/C++Gnu MakePerlPythonSystemverilogUvm
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