Teams at Lattice Semiconductor

Leads firmware architecture, technical strategy, complex design and integration across projects. Mentors engineers, collaborates with hardware, software, and product teams, participates in code reviews, and ensures firmware scalability, reliability, and performance. Requires extensive embedded systems experience, C/C++ expertise, RTOS knowledge, hardware-software co-design experience, and system-level performance optimization skills.

Leads the Pune firmware organization responsible for architecture, development, integration, validation, security, release, and lifecycle management of multiple firmware stacks. Establishes secure development and compliance processes, drives pre- and post-silicon bring-up, collaborates with ASIC, FPGA, verification, security, and product teams, and partners with customers and infrastructure vendors. Recruits and develops engineering talent, reports program status to executives, and applies generative AI to improve engineering productivity.

Develop and architect Lattice’s FPGA EDA toolchain, including synthesis, place and route, and timing analysis. Collaborate across engineering teams to deliver a standards-compliant, reliable, and high-performance tool suite. Translate marketing requirements into technical specifications, own specification and planning processes, improve development methodologies, and lead projects and technical discussions.