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Cadence Design Systems

Lead Design Engineer

Posted 13 Days Ago
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2 Locations
Senior level
2 Locations
Senior level
Coordinate testing, oversee staff, drive Jira ticket closure, plan customer silicon bringups, recommend quality improvements, and debug customer issues.
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At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.

Coordinate and oversee Bangalore staff doing test chip bringup and validation, customer bringups and support, as well as collateral development of IBIS, Die models, SIPI analysis, test software development.   

Track and drive Jira ticket closure by staff. 

Plan customer silicon bringups and post silicon queries of our IP and help drive team working to debug customer issues with same.  

Recommend and pursue improvements to ensure the highest quality IP is produced by Cadence and minimize any silicon issues experienced by our customers.

We’re doing work that matters. Help us solve what others can’t.

Top Skills

JIRA

Cadence Design Systems Pune, Mahārāshtra, IND Office

Building No 1 , First Floor, Samrat Ashok Path, Commerzone IT Park, Yerawada, Pune, Maharashtra, India, 411006

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