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2 Days Ago
2 Locations
Senior level
Senior level
Semiconductor
The role involves driving backend processes, optimizing design for power and area, and ensuring timing closure and physical verification for IC design.
Top Skills: Clock Tree SynthesisLow-Power DesignPhysical DesignPhysical VerificationPower And Area OptimizationStatic Timing Verification
6 Days Ago
2 Locations
Senior level
Senior level
Semiconductor
Develop Interface and Analog IPs for ASIC and external customers, ensuring solid IP development methodologies and supporting multiple customers through hands-on engineering.
Top Skills: Analog IpAsicCircuit DesignDdrFinfetHbmMixed SignalSerdes
6 Days Ago
2 Locations
Senior level
Senior level
Semiconductor
This role involves driving backend physical design processes, including power planning, timing verification, and physical verification for IC design.
Top Skills: Clock Tree SynthesisDrcErcIc DesignLvsPhysical DesignStatic Timing Verification
6 Days Ago
Pune, Maharashtra, IND
Senior level
Senior level
Semiconductor
Develop device interface functions, oversee firmware lifecycle, collaborate on validation requirements, mentor junior engineers, and enhance processes.
Top Skills: ArmBios/UefiC/C++Eda ToolsEthernetI2CLinux KernelMipsNvmePciePythonRiscvRtosSerdesSpi/QspiSystem VerilogUsbVerilog
6 Days Ago
2 Locations
Senior level
Senior level
Semiconductor
Responsible for verifying IP, Block, or Subsystem at SoC level. Duties include developing verification environments, documentation, and debugging tasks.
Top Skills: AhbAmbaApbAxiCxlHbmOvmPciePerlPythonSystem VerilogUvmVerilog
6 Days Ago
2 Locations
Expert/Leader
Expert/Leader
Semiconductor
The role involves managing a design/RTL team, supporting pre-sales architecture proposals, and ensuring delivery of micro-architecture for SoCs. Responsibilities include collaboration with customers, IP vendors, and technical support.
Top Skills: AhbAxiDesign Compiler SynthesisEthernetFormal VerificationMicro-ArchitecturePcieSoc DevelopmentUsb
6 Days Ago
2 Locations
Junior
Junior
Semiconductor
Responsible for pre-sales support, architecture proposal, managing design teams, achieving project goals, and providing technical support to customers.
Top Skills: AhbAsic DesignAxiDesign Compiler SynthesisEthernetFormal VerificationLecMicro-ArchitecturePcieSoc DevelopmentTiming ClosureUsb
6 Days Ago
2 Locations
Mid level
Mid level
Semiconductor
The Design Verification Engineer will oversee verification of new features, build testbenches, and integrate protocols while collaborating with various technical teams to improve methodologies.
Top Skills: C/C++Gnu MakePerlPythonSystemverilogUvm
6 Days Ago
2 Locations
Mid level
Mid level
Semiconductor
You will develop methodologies and flows for DFT in a collaborative environment, creating verification solutions, timing checks, and implementing automated verification techniques.
Top Skills: Verilog,Vhdl,System Verilog,Perl,Tcl,Python
7 Days Ago
2 Locations
Senior level
Senior level
Semiconductor
Responsible for verification of IP or SoC level components, analyzing and debugging verification tasks, and developing verification environments.
Top Skills: AmbaCanDdrEmmcGbeI2CI3CLpddrOvmPciePerlPythonQspiSataSpiSystem VerilogUartUsbUvmVerilog
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