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Alphawave IP, Inc. Logo
Alphawave IP, Inc.

Senior Engineer I - DFT

Reposted 5 Days AgoSaved
In-Office
2 Locations
Mid level
Mid level
Semiconductor
The Senior Engineer I - DFT will lead DFT strategy, develop verification methodologies, automate test bench creation, and ensure timing checks for SoCs.
Top Skills: Verilog,Vhdl,System Verilog,Perl,Tcl,Python,Jtag,Bist
Alphawave IP, Inc. Logo
Alphawave IP, Inc.

Staff Engineer II - Physical Design

Reposted 13 Days AgoSaved
In-Office
2 Locations
Senior level
Senior level
Semiconductor
The role involves driving backend processes, optimizing design for power and area, and ensuring timing closure and physical verification for IC design.
Top Skills: Clock Tree SynthesisLow-Power DesignPhysical DesignPhysical VerificationPower And Area OptimizationStatic Timing Verification
Alphawave IP, Inc. Logo
Alphawave IP, Inc.

Senior Engineer I - Software

Reposted 16 Days AgoSaved
In-Office
Pune, Maharashtra, IND
Senior level
Senior level
Semiconductor
Develop device interface functions, oversee firmware lifecycle, collaborate on validation requirements, mentor junior engineers, and enhance processes.
Top Skills: ArmBios/UefiC/C++Eda ToolsEthernetI2CLinux KernelMipsNvmePciePythonRiscvRtosSerdesSpi/QspiSystem VerilogUsbVerilog
Alphawave IP, Inc. Logo
Alphawave IP, Inc.

Senior Engineer II Analog Design

Reposted 16 Days AgoSaved
In-Office
2 Locations
Senior level
Senior level
Semiconductor
Develop Interface and Analog IPs for ASIC and external customers, ensuring solid IP development methodologies and supporting multiple customers through hands-on engineering.
Top Skills: Analog IpAsicCircuit DesignDdrFinfetHbmMixed SignalSerdes
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