Top Design Engineer Jobs in Pune

As a Senior Design Engineer at Magna, you'll work on developing automotive technologies, ensuring high-quality product delivery while being part of a dynamic and innovative team.

The Design Engineer I will support VAVE activities, create mechanical drawings in SolidWorks, and collaborate with cross-functional teams on design projects.

The Principle Design Engineer at Cadence will work on cutting-edge technology, applying their expertise in electronic design to deliver software and hardware solutions. They will be responsible for using various Cadence tools, conducting design and verification, and solving technical challenges while collaborating with a diverse team.

The Lead Design Engineer at Cadence is responsible for digital design implementation, PPA optimization of advanced IP cores, and automation of EDA flows using various Cadence tools. The role involves managing regression infrastructure and participating in benchmarking customer engagements.

The Design Engineer Associate will support Design To Order (DTO) and Engineered To Order (ETO) projects, assisting in 2D/3D layouts, developing drawing packages, and collaborating with cross-functional teams while using CAD software. The role requires problem-solving skills and the ability to interpret technical specifications.

The Design Engineer II role involves designing and improving industrial products, executing ETO/DTO projects, developing test plans, and translating customer needs into manufacturing requirements while collaborating with cross-functional teams.

The Lead Design Engineer at Cadence is responsible for ASIC design and verification, particularly in the PCIe and storage domains. The role requires strong debugging skills and effective communication to tackle complex technological challenges.

The Lead Design Engineer at Cadence will develop performance models, conduct architectural tradeoff analysis, and facilitate data-driven design for DDR memory controller architectures. Responsibilities include modeling in SystemC or C++, correlating performance data, collaborating with architects, analyzing various architectural scenarios, and automating performance metrics generation post-simulation.