Top Design Engineer Jobs in Pune

Design civil engineering projects using MicroStation for US residential and commercial developments. Ensure compliance with codes and client requirements, manage project delivery, mentor junior engineers, provide technical support, and lead client meetings.

Create and maintain electrical BIM/VDC models and detailed shop/coordination drawings using Revit, AutoCAD, and Navisworks. Design electrical rooms, cable tray and conduit routing, perform clash detection, coordinate multidisciplinary models, support constructability reviews, and ensure timely delivery of project documentation while collaborating with field and project stakeholders.

Design and develop high-speed, low-power custom circuits (memory, FPGA fabric) in advanced FinFET/nm CMOS processes. Perform schematic capture, SPICE simulation, margin and functional verification, layout planning, and tight pitch-matched memory layout. Collaborate on PPA and yield targets, manage full design flow including characterization, timing, compiler usage, and model generation, and drive innovation across FPGA product designs.

Lead block-level physical implementation of digital blocks/IP from netlist to GDSII: floorplanning, power planning, placement, CTS, routing, STA, physical verification and sign-off, low-power implementation (UPF), flow automation, ECO support, and tape-out correlation.

Lead IP and full-chip FPGA/SoC subsystem design and integration, define micro-architecture, drive logic design to meet performance/power/area targets, conduct reviews/audits, collaborate across functions and global teams, and mentor engineering members.

Lead development and validation of analog, digital, and mixed-signal circuit models for Lattice FPGAs. Use SPICE and HDL simulations (Verilog/VHDL/SystemVerilog), mentor modeling engineers, collaborate with design teams, analyze simulation results, optimize models for performance and accuracy, and document modeling processes.

Design and integrate SoC/IP RTL for FPGA products using Verilog/SystemVerilog; define micro-architecture; perform SoC integration and quality checks (lint, CDC, RDC, SDC); develop assertions and checkers; mentor team members and collaborate with global teams. Occasional travel to support projects.

Design and integrate SoC/IP RTL for FPGA products using Verilog/SystemVerilog. Drive logic design, enforce coding standards, run quality checks (lint, CDC, RDC, SDC), develop assertions/checkers, collaborate with architects and global teams, mentor engineers, and support FPGA full-chip integration and debug.

Design automotive plastic bumper fascia components using CATIA. Develop part and assembly layouts, ensure packaging and performance targets, optimize designs for cost and efficiency, and use CATIA workbenches for part, surface, drafting, and assembly modeling.

Design automotive plastic components using CATIA to create part, shape, drafting, and assembly layouts that meet packaging and performance targets. Improve design efficiency, reduce part costs, and apply engineering principles to bumper fascia and related mobility systems.

Lead and execute backend SoC physical design for 5nm and below: floorplanning, partitioning, placement, CTS, routing, extraction, physical verification, timing closure, ECOs, and automation using Cadence/Synopsys/Mentor EDA tools and scripting (Tcl/Perl).

Lead SOC physical design work including block-level floorplanning, placement, CTS, routing, and physical verification. Perform STA, equivalence checks, crosstalk/noise analysis, power optimization, and implement timing/functional ECOs. Collaborate globally, guide team members, and adapt to new tools and methodologies.

Lead physical design for complex ASICs across architecture, logic, synthesis, place-and-route, timing and power analysis. Owns design delivery, mentors junior engineers, evaluates process flow and vendor capabilities, and manages major projects.

Perform mechanical design for HVACR products: create/modify 3D models and 2D drawings, apply GD&T and tolerance analysis, manage BOMs and ECNs in PLM, ensure manufacturability, support design reviews, and collaborate with cross-functional teams to improve processes and deliver quality designs on time.

Design and detail mobile and modular diesel generator products: produce conceptual layouts, 3D models and manufacturing drawings, maintain BOMs and part specs, ensure adherence to standards and document control, source components, and provide technical support through manufacture and field operations.

Owner of block- and chip-level physical implementation for silicon photonics driver ICs. Perform floorplanning, place-and-route, clock/power distribution, STA and ECOs, power/IR/EM checks, physical verification, and automation scripting. Collaborate with RTL, analog, DFT, packaging, CAD, and EDA vendors to achieve timing, power, area, congestion, and signoff closure through production.

Design and detail pressure vessels and related piping/skid systems per customer requirements and standards. Work cross-functionally to ensure safety, manufacturability, and compliance; support technical meetings, troubleshooting, and supplier/customer coordination.

Lead full-chip or large-block physical implementation from netlist to GDSII. Drive floorplanning, placement, CTS, routing, STA timing closure, DRC/LVS/EM/IR signoff, ECOs, hard-macro integration, PPA optimization, and automation scripting while collaborating with RTL, architecture, verification, and foundry teams.

The role involves leading a team of Physical Design engineers in delivering high-performance silicon products while ensuring adherence to timing, power, and area requirements. Responsibilities include technical leadership, hands-on ownership of critical blocks, automation development, and stakeholder management to meet project milestones.

Develop and verify shuttle layout for TI process nodes and tapeouts, ensure DRC and reticle compliance, collaborate with process and PDK teams, and create AI-driven automation tools to accelerate execution.

The Design Engineer will provide equipment engineering design solutions by performing calculations, designing HVAC systems using CAD, and supporting lab teams with documentation.

Design and simulate transistor-level analog/mixed-signal IC blocks (amplifiers, converters, power circuits), define architectures, integrate blocks into mixed-signal systems, present results to teams/customers, support layout, lab evaluation and test, mentor others, and improve design methodologies to meet power, timing and functional objectives.

Design and verify high-speed mixed-signal communication and high-performance digital circuits. Perform RTL coding, simulation, synthesis, timing closure, verification, and debugging at circuit and behavioral levels. Prepare test methods, specifications, datasheets, and demo boards. Collaborate with analog and digital teams and manage multiple tasks to deliver projects on time.

Own end-to-end UI/UX and frontend implementation: design user flows, craft high-fidelity prototypes, build responsive React+TypeScript interfaces, implement scalable component architecture, integrate with REST/GraphQL APIs, optimize performance, and collaborate with backend and product teams in a regulated life-sciences context.

Develop, validate, and optimize analog, digital, and mixed-signal circuit models for Lattice FPGAs. Use Verilog/VHDL/SystemVerilog and SPICE simulations, analyze results, collaborate with design teams, mentor engineers, and document modeling processes.