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The Senior Staff Engineer - DFT is responsible for implementing and validating DFT/Test on complex IP and SoCs, guiding a small team of engineers, and enhancing DFT methodologies and tools. Responsibilities include executing DFT features, pattern generation, post-silicon bringup, and debugging.

The role involves managing and improving Marvell's Resiliency Program, focusing on crisis management, business continuity, and disaster recovery. The analyst coordinates with teams to prepare for disruptive events, conducts risk assessments, develops recovery plans, and monitors organizational resilience metrics, all while ensuring effective communication and compliance with best practices.

The Senior Staff Engineer is responsible for designing and implementing critical firmware for high-speed data storage communication, understanding fiber channel specifications, performing unit tests, debugging field issues, and collaborating with global teams while addressing customer requirements.

The Senior Staff DFT Engineer will implement DFT/Test on complex IPs and SoCs, requiring extensive knowledge of DFT architecture solutions, along with hands-on leadership in the DFT/Test process. Responsibilities include pattern generation, verification, timing, and post-silicon debug within custom ASIC/SoC designs, collaborating with teams to enable customer DFT requirements.

You will architect, lead, and implement DFT/Test on complex IP and SoC designs while mentoring a small team. Responsibilities include DFT architecture definition, execution of DFT/DFX features, and defining methodologies/tools for benchmarking.