Responsible for developing risk-based strategies for business continuity and disaster recovery, coordinating with teams, and improving organizational resilience.

Top Skills: Business Continuity PlanningCybersecurity PrinciplesDisaster Recovery PlanningRisk Management Frameworks

Marvell Technology

Senior Staff Engineer

15 Days Ago

3 Locations

Senior level

Semiconductor

Design and implement firmware for high-speed data storage communication while debugging and testing with a global team based on customer requirements.

Top Skills: Arm ProcessorsAssembly LanguageCFiconFirmwareNvmeRisc ProcessorsScsi

Marvell Technology

Senior Staff DFT Engineer

15 Days Ago

2 Locations

Senior level

Semiconductor

The role involves implementing DFT and Test on intricate ASIC/SoC designs, requiring in-depth knowledge and hands-on experience in DFT/Test architecture, verification, and design methodologies.

Top Skills: AsicC-ShellCadenceDftDigital Circuit DesignMentorPerlSynopsysTclTest

Marvell Technology

Senior Staff Engineer - DFT

15 Days Ago

2 Locations

Senior level

Semiconductor

Architect and lead DFT/Test implementation for complex IP and SoCs. Define methodologies and mentor a small team across multiple designs.

Top Skills: AsicC-ShellDftDigital Circuit DesignLogic DesignPerlSiemens Tool SetSocSynopsys Tool SetTcl

Marvell Technology

Principal Engineer, RTL Design

19 Days Ago

2 Locations

Senior level

Semiconductor

The Principal Engineer will define micro-architectures, implement RTL coding, collaborate with various teams, and mentor junior engineers in semiconductor solutions.

Top Skills: AhbAxiDdr2Ddr3I2CPciePerlRtlSpiTclUartUnix ShellUsb

Marvell Technology

Senior Staff Verification Engineer

20 Days Ago

Pune, Maharashtra, IND

Senior level

Semiconductor

Lead verification efforts, develop UVM-based environments, define test plans, ensure design closure, and collaborate with design teams for innovative data processing solutions.

Top Skills: CC++PerlPythonSystemverilogTclUvmVerilog